Converged
Optics.

The primary engineering challenge of co-packaged optics is not optical alignment or fiber management — it is heat. Placing an optical engine within 5 mm of the switch ASIC means the optical components must operate at the ASIC's junction temperature, which can reach 105°C under full load. Silicon photonic modulators and germanium photodetectors are highly temperature-sensitive: the modulator's electro-optic coefficient (r33) decreases by 0.3% per °C, and the photodetector's dark current doubles every 10°C above 85°C. At 105°C, a silicon photonic modulator requires 2.5x the drive voltage compared to 60°C, directly increasing the power consumption of the laser driver.

The thermal budget for a CPO module is determined by the maximum junction temperature of the laser source. Continuous-wave (CW) lasers — the most common light source for CPO — are typically rated for a maximum case temperature of 85°C. In a CPO module, the laser is mounted on a **Thermo-Electric Cooler (TEC)** that maintains its temperature at 55°C even when the ambient switch temperature is 105°C. Each TEC consumes 2-3 W of electrical power per laser, drawing heat away from the laser and rejecting it into the switch's heatsink. For a 102.4 Tbps CPO switch with 64 lasers (one per 1.6T port group), the TEC power alone is 128-192 W — a significant fraction of the total switch power budget of 1,500 W.

Thermal crosstalk between adjacent optical channels is a second-order effect that limits channel density. Each silicon photonic Mach-Zehnder Modulator (MZM) dissipates approximately 50 mW of heat into the silicon substrate. With 64 modulators packed into a 5 mm x 5 mm die, the local heat flux reaches 128 W/cm^2 — comparable to the heat flux of the switch ASIC itself. This creates thermal gradients across the photonic die, causing differential expansion that misaligns the grating couplers. The misalignment increases coupling loss by 0.1 dB per degree of thermal gradient, and a 10°C gradient across the die produces a 1 dB loss penalty — enough to close the link margin.

Mitigating these thermal effects requires **through-silicon thermal vias (TSTVs)** in the photonic interposer. These copper-filled vias conduct heat from the modulator layer to a dedicated thermal spreader on the backside of the interposer, reducing the thermal gradient from 12°C to 3°C in production 2026 designs. The next generation of CPO modules will integrate **microfluidic cooling channels** directly into the silicon photonic interposer, circulating dielectric coolant (3M Novec 7500) through 50-micron wide channels etched between the modulator rows. Microfluidic cooling reduces the junction temperature of the photonic devices from 105°C to 65°C, eliminating the need for TECs entirely and saving 150 W of switch power.